Thin film silicon technology has been widely used in large-area high-resolution liquid crystal display panels ("LCDs") and 2-dimensional image sensor arrays, both of which have a similar matrix of pixels. Generally, the pixels are defined by the intersection of metal lines which are connected to the gate and drain of a thin film transistor ("TFT"). When a voltage pulse is applied to the gate lines, electrical charge is transferred from the pixels to the output lines or vice versa. In an LCD, each pixel contains a TFT and a capacitor which causes the liquid crystal molecules to rotate when the capacitor is charged. In a sensor array, each pixel contains a TFT and an amorphous silicon p-i-n diode which stores electrical charges created by light and outputs the charges to an external read-out electronics when the TFT is switched on. The ability to fabricate smaller and faster TFTs is a key element in improving the resolution and the response time of large-area displays or sensors.
In order to make faster and smaller TFTs, it is necessary to form shallow and highly doped regions under the source and drain electrodes of a TFT. Shallow and highly-doped source and drain regions produce smaller device geometry, lower contact resistance, and lower junction capacitance, all of which in turn result in higher aperture ratio and better response time.
A commonly used technique to dope a semiconductor material is by ion implantation, which generally requires the use of toxic gases such as BF.sub.3 and PF.sub.5. Not only is this process potentially hazardous to the environment, it also creates substantial damage in the lattice of the semiconductor material. In order to remove the damage created by the implanted ions, the semiconductor material often has to undergo a long annealing cycle at high temperatures generally in excess of 600.degree. C. Such an annealing process makes it difficult to form shallow junctions and highly doped regions because of diffusion. Worse yet, certain types of dopants such as boron, tend to create deep junctions when implanted because of so-called "channeling effects" even in the absence of a high temperature annealing step.
In addition to the difficulty in forming shallow junctions, ion implantation is ill-suited to the fabrication of large-area displays and sensors because they are typically fabricated on glass substrates, whose structural integrity and stability deteriorate at high temperatures. Hence, it is important to develop a process which does not subject such substrates to high temperatures. Furthermore, the implantation process currently limits the size of the substrates on which devices and circuits can be built. There is very limited availability of commercial ion implantation equipment that can be used for substrates larger than ten to eleven inches in size. Therefore, in order to achieve shallow junctions and high doping levels in TFTs, extensive efforts have been expended to develop a low temperature doping process of at least below 600.degree. C. by using lasers.
One approach is generally known as gas immersion laser doping ("GILD"). An example of this approach is described in "Ultra-Shallow High-Concentration Boron Profiles for CMOS Processing," IEEE Electron Device Letters, vol. EDL-6, No. 6, June 1985. Under this approach, a semiconductor sample is placed in a reaction chamber into which dopants in their gaseous form such as BF.sub.3 and PF.sub.5 are introduced. Then, a pulsed excimer laser is used to irradiate the sample. The energy of the laser breaks the gas molecules and melts a thin layer of the semiconductor materials. The molecules that have sufficient kinetic energy are then absorbed by the molten semiconductor. Thus, the doping efficiency of this method depends upon the amount of dopants being absorbed by the molten semiconductor materials.
Under this approach, the substrate of the sample stays at low temperatures because each laser pulse lasts for only about 30 to 50 ns, which is only sufficient to melt approximately a few monolayers of materials. Because of the short duration, very shallow junctions can be achieved. However, since the incorporation of the dopants is limited by the equilibrium surface absorption rate at a given temperature, it is very difficult to achieve high doping levels. In order to increase the doping level, the sample needs to be irradiated by multiple pulses, which would adversely impact the throughput of this process. In other words, it is difficult for such a process to achieve high doping.
Another approach is to use a solid source such as one described in "In Situ Crystallization and Doping of a-Si Film by Means of Spin-On Glass" MRS Symposium Proceedings, vol 345, p. 59-64, 1994. Under this approach, a film transparent to lasers such as phosphorus-doped spin-on-glass ("SOG") is first spun onto the sample. When the laser irradiates the sample with the SOG, the sample is heated up to an adequately high temperature so that the dopants in the SOG can diffuse into the sample. However, since the SOG film is transparent, no absorption of laser energy by the SOG itself occurs. The approach is limited by the solid solubility limit of the dopants in the material, which again results in low doping levels. Besides low doping efficiency, another disadvantage is the difficulty associated with removing the solid doping source on the semiconductor sample. Often, the laser alters the interface between the doping source and the underlying material, damaging the surface of the underlying material when the doping source is removed.
Recently, an approach which can produce relatively high doping efficiency using lasers was set forth in "Low Temperature Fabrication of Poly-Silicon TFT's Using In-Situ Chemically Cleaning Method," Material Research Society Symposium, v. 283, p0. 629-634 (1993). Under this approach, a doped amorphous silicon layer, which is not transparent to lasers, is deposited by a method known as plasma enhanced chemical vapor deposition ("PECVD"). A laser is then used to melt and recrystallize the doped amorphous silicon film, resulting in relatively shallow and highly doped regions. However, this process does not resolve the problem associated with the subsequent removal of the deposited material. It is very difficult to selectively remove the doped amorphous silicon layer, which typically responds to etchants in a manner which is similar to that of the underlying semiconductor material.